1. Field of the Invention
The present invention relates to an information processing apparatus and, more particularly, it relates to a control system for adjusting the performance of the information processing apparatus.
2. Description of the Related Art
In the typical information processing apparatus, the processing performance of the apparatus usually must be set to a predetermined target level. For example, a plurality of models forming one family must accomplish a plurality of different target performance goals. However, in such a case, if each model is designed and manufactured on an individual basis, the cost thereof is greatly increased. Therefore, in many cases, one information processing apparatus, having a high level of performance as a basic performance is prepared, and the various factors which affect the performance of the apparatus, such as processing speed, are adjusted with respect to the lower model prepared information processing apparatus. Thus an apparatus i.e., the models thereof, having a plurality of required target characteristics is obtained.
Many methods are used for adjusting the performance of the information processing apparatus. The main elements among these methods are shown below.
(1) Hardware Adjustment
(a) Modification of buffer memory capacity PA1 (b) Modification of degrees of a leading control PA1 (c) Utilization and non-utilization of a high speed operation mechanism PA1 (a) Inserting a dummy step into a microprogram PA1 (b) Inserting a dummy interlock
When the capacity of a buffer memory is modified, the condition at which a buffer miss or hit occurs may vary, and a frequency causing the buffer miss or hit may also vary, having an effect on the processing speed. This method is often utilized. PA2 The manner in which instructions are packed in pipe lines or the degree for parallel processing is modified to cause a change in the processing efficiency. PA2 The speed of an arithmetic operation is changed by the addition or removal of an operation mechanism such as a high speed adder or a high speed multiplier. PA2 By inserting a dummy step into a microprogram, the number of steps in which no operation is performed is increased, and thus the processing time can be extended. PA2 A code causing a dummy interlock during the processing of the pipe line is set in the microprogram.
(2) Microprogram Adjustments
In the conventional method for adjusting the performance of the device mentioned above, the desired target performance value cannot be absolutely guaranteed, and this causes a problem in that variances occur therein in accordance with the system application circumstances. For example, in an application in which the amount of use of the buffer memory is originally low, if the capacity of the buffer memory is decreased, the processing time is not increased, and thus the performance is not degraded. However, in an application in which the amount of use of the buffer memory is high, if the capacity of the buffer memory is decreased, the processing time is suddenly increased, and a considerable degradation of the performance is caused. Further, in the method of inserting a dummy step, etc., into the microprogram, the microprogram is modified for each model. This causes a problem in that correction or management or maintenance of the microprogram becomes difficult. A further problem arises in that a larger capacity of the control memory is required more often in low order models.